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20.3.7 SIUFC_2 (0x0C00 0002: Write)
Bit
7
Name
FCR7
R/W
W
RTCRST
0
Other resets
0
Bit
Name
7, 6
FCR(7:6)
5, 4
Reserved
3
FCR3
2
FCR2
1
FCR1
0
FCR0
This register is used to control the FIFOs.
CHAPTER 20 SERIAL INTERFACE UNIT 2 (SIU2)
6
5
FCR6
Reserved
Reserved
W
R
0
0
0
0
Receive FIFO trigger level
11 : 14 bytes
10 : 8 bytes
01 : 4 bytes
00 : 0 bytes
0 is returned when read
Switch between 16450 mode and FIFO mode
1 : From 16450 mode to FIFO mode
0 : From FIFO mode to 16450 mode
Transmit FIFO and its counter clear. Cleared to 0 when 1 is written.
1 : FIFO and its counter clear
0 : Normal
Receive FIFO and its counter clear. Cleared to 0 when 1 is written.
1 : FIFO and its counter clear
0 : Normal
Receive/Transmit FIFO enable. Cleared to 0 when 1 is written.
1 : Enable
0 : Disable
User's Manual U14272EJ3V0UM
4
3
2
FCR3
FCR2
R
W
W
0
0
0
0
0
0
Function
1
0
FCR1
FCR0
W
W
0
0
0
0
387
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