Chapter 19 Serial Interface Unit 1 (Siu1); General; Clock Control Logic - NEC VR4181 mPD30181 User Manual

64-/32-bit microprocessor hardware
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19.1 General

The SIU1 is a serial interface that conforms to the RS-232-C communication standard and is equipped with two
one-channel interfaces, one for transmission and one for reception.
This unit is functionally compatible with the NS16550 except for the additional clock control logic to permit the
16650 core clock source to be stopped.
TxD1
RxD1
RTS1#
DCD1#
DTR1#
Caution No clock is supplied to the SIU1 in the initial state. When using the SIU1, set the MSKSIU18M bit
of the CMUCLKMSK register in the MBA Host Bridge to 1 in advance so that the clock is
supplied.

19.2 Clock Control Logic

The power of the 16550 core can be managed by monitoring activity on the modem status pins and writes to the
transmit buffer.
The clock control logic for the 16550 core monitors activity on the four serial interface input signals; RxD1, RTS1#,
DCD1#, and DTR1#. It also monitors writes to the 16550 transmit buffer. Each source has an associated mask bit
which prevents a source from causing reset of the Activity Timer.
Activity on the RxD1, RTS1#, DCD1#, and DTR1# inputs is defined as any change of state (high to low or low to
high). When no unmasked activity has been detected on any of the inputs, and no writes have occurred to the
transmit buffer within the programmed time-out period specified in the Activity Timer block, the UART1_clock is
stopped. The UART1_clock will remain stopped until any activity is detected on the monitored sources.
360

CHAPTER 19 SERIAL INTERFACE UNIT 1 (SIU1)

Figure 19-1. SIU1 Block Diagram
V
4181
R
UART1
Activity Timer 1
User's Manual U14272E3V0UM
SIU1
UART1_clock
seclk_siu
clk32k

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