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2.2.2 LCD interface signals
Signal name
SHCLK/LCDCS#
LOCLK/MEMCS16#
FLM/MIPS16EN
Note
FPD(7:4)/GPIO(15:12)
Note
FPD(3:0)
VPLCD/VPGPIO1
VPBIAS/VPGPIO0
Note Connection between FPD(7:0) of the V
width as below.
For details, refer to CHAPTER 21 LCD CONTROLLER.
FPD0
FPD1
FPD2
FPD3
FPD4
FPD5
FPD6
FPD7
54
CHAPTER 2 PIN FUNCTIONS
I/O
Output
LCD shift clock output or chip select for external LCD controller.
I/O
LCD load clock output or bus sizing request input for system bus memory access.
When using as MEMCS16#, the external agent must activate this signal at the
system bus memory access in 16-bit width.
I/O
The function of this pin differs depending on the operating status.
<During RTC reset (input)>
This signal enables use of MIPS16 instructions.
0: Disable use of MIPS16 instructions
1: Enable use of MIPS16 instructions
<During normal operation (output)>
LCD first line clock output.
See 2.2.11 General-purpose I/O signals in this section.
Output
Output
LCD screen data.
Output
LCD logic power control. This signal may be defined as a general-purpose output
when an external LCD controller is used.
Output
LCD bias power control. This signal may be defined as a general-purpose output
when an external LCD controller is used.
4181 and LCD panel data lines differs depending on the panel data
R
V
4181
LCD Panel Data (4-bit width)
R
Data Line 0
Data Line 1
Data Line 2
Data Line 3
User's Manual U14272EJ3V0UM
Description of function
LCD Panel Data (8-bit width)
Data Line 4
Data Line 5
Data Line 6
Data Line 7
−
Data Line 0
−
Data Line 1
−
Data Line 2
−
Data Line 3
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