Internal I/O Space - NEC VR4181 mPD30181 User Manual

64-/32-bit microprocessor hardware
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4.2.3 Internal I/O space

The V
4181 has three internal I/O spaces. Each of these spaces is described below.
R
0x0C00 001F to 0x0C00 0010
0x0C00 000F to 0x0C00 0000
0x0B00 09FF to 0x0B00 0900
0x0B00 08FF to 0x0B00 0800
0x0B00 07FF to 0x0B00 0400
0x0B00 03FF to 0x0B00 0300
0x0B00 02FF to 0x0B00 02D0
0x0B00 02CF to 0x0B00 02C0
0x0B00 02BF to 0x0B00 02A0
0x0B00 029F to 0x0B00 0280
0x0B00 027F to 0x0B00 0260
0x0B00 025F to 0x0B00 0240
0x0B00 023F to 0x0B00 01E0
0x0B00 01DF to 0x0B00 01C0
0x0B00 01BF to 0x0B00 01A0
0x0B00 019F to 0x0B00 0180
0x0B00 017F to 0x0B00 0160
0x0B00 015F to 0x0B00 0140
0x0B00 013F to 0x0B00 0120
0x0B00 011F to 0x0B00 0100
0x0B00 00FF to 0x0B00 00E0
0x0B00 00DF to 0x0B00 00C0
0x0B00 00BF to 0x0B00 00A0
0x0B00 009F to 0x0B00 0080
0x0B00 007F to 0x0B00 0000
94
CHAPTER 4 MEMORY MANAGEMENT SYSTEM
Table 4-3. Internal I/O Space 1
Physical address
SIU1
SIU2
Table 4-4. Internal I/O Space 2
Physical address
CSI
ECU
Reserved for future use
GIU
Reserved for future use
ISA Bridge
PIU-2
Reserved for future use
A/D test
LED
Reserved for future use
RTC-2
Reserved for future use
KIU
AIU
Reserved for future use
PIU-1
Reserved for future use
DSU
RTC-1
PMU
ICU-3
Reserved for future use
User's Manual U14272EJ3V0UM
Internal I/O
Internal I/O

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