Sdmadatreg (0X0B00 0160) - NEC VR4181 mPD30181 User Manual

15.2.1 SDMADATREG (0x0B00 0160)

Bit 15
Name Reserved
R/W R
RTCRST 0
Other resets 0
Bit 7
Name SDMA7
R/W R/W
RTCRST 0
Other resets 0
Bit Name
15 to 10 Reserved
9 to 0 SDMA(9:0)
This register is used to store 10-bit DMA data for speaker output. When SODATREG register is empty, the data is
transferred to the SODATREG register.
Write is used for debugging and is enabled when the AIUSEN bit of the SEQREG register is set to 1. This register
is initialized (0x0200) by resetting the AIUSEN bit of the SEQREG register to 0.
CHAPTER 15 AUDIO INTERFACE UNIT (AIU)
14 13
Reserved Reserved Reserved
R R
0 0
0 0
6 5
SDMA6 SDMA5
R/W R/W
0 0
0 0
0 is returned when read
Speaker output DMA data
User's Manual U14272EJ3V0UM
12 11
Reserved Reserved
R R
0 0
0 0
4 3
SDMA4 SDMA3 SDMA2
R/W R/W
0 0
0 0
Function
10 9
SDMA9 SDMA8
R R/W R/W
0 1
0 1
2 1
SDMA1 SDMA0
R/W R/W R/W
0 0
0 0
8
0
0
0
0
0
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