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3.5.3 Peripheral Status Register (PHS)
The flag PRERR in the peripheral status register PHS indicates protection error occurrence.
This register can be read/written in 8-bit units or bit-wise.
7
6
PHS
0
0
Protection error detection:
If an incorrect write operation in a sequence without accessing the command register is performed to a
protected internal register, the register is not written to, causing a protection error.
Writing "0" to the PRERR flag after the value is checked clears the error.
Operation conditions of PRERR flag:
Set condition:
<1>
If the most recent store instruction for peripheral I/O register operation is not an operation to
write the PHCMD register and if data is written to the specific register
<2>
If the first store instruction operation after data has been written to the PHCMD register is to
memory or peripheral I/Os other than those of a specified register
Reset condition:
<1>
When "0" is written to the PRERR flag of the PHS register
<2>
On system reset
Chapter 3 CPU Function
5
4
3
0
0
0
Preliminary User's Manual U14913EE1V0UM00
2
1
0
0
0
PRERR FFFFF802H
Address
R/W
At Reset
R/W
00H
117
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