Keysight E4980A User Manual page 474

Handler Interface
Setting Up the Handler Interface Board
Table E-10 Bit switch (S1) settings
Bit Factory
defaul t
1
number
settings
1 Off
2 Off
3 On
4 Off
5 Off
6 Off
7 -
8 -
1. The bit numbers referenced in this table are the numbers printed on the bit switch (S1) of the handler interface board.
-474
Description
When you set JP2 to 1 or JP2 to 3 and set EXT.DCV2 to 5 V through
6 V, set this bit to ON as well. 
As a result, the input current limiting resistor for the /EXT_TRIG
signal is set to 316 .
When you set JP2 to 3 and set EXT.DCV2 to 6 V through 9 V, set
this bit to ON as well. 
As a result, the input current limiting resistor for the /EXT_TRIG
signal is set to 562 .
When you set JP2 to 2 or 3 and set EXT.DCV2 to 9 V through 15 V,
set this bit to ON as well. 
As a result, the input current limiting resistor for the /EXT_TRIG
signal is set to 1 k.
When you set JP2 to 3 and set EXT.DCV2 to 15 V through 24 V, set
this bit to ON as well. 
As a result, the input current limiting resistor for the /EXT_TRIG
signal is set to 2.27 k.
DC isolation switch for COM1.
When this switch is ON, COM1 is connected to the instrument's
circuit common line; therefore, the DC isolation output is not
isolated.
When this switch is OFF, the DC isolation output for COM1 is
isolated.
DC isolation switch for COM2.
When this switch is ON, COM2 is connected to the instrument's
circuit common line; therefore, the DC isolation output is not
isolated.
When this switch is OFF, the DC isolation output for COM2 is
isolated.
Not used.
Not used.
Affected signals
/EXT_TRIG
/BIN1to /BIN9
/AUX_BIN
/OUT_OF_BIN
/PHI to /OVLD
/INDEX
/EOM
/ALARM
/EXT_TRIG
/KEY_LOCK
/READY_FOR_TRIGGER
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Keysight E4980A/AL User's Guide