Asynchronous Hardware Reset; Asynchronous Jtag Reset - Siemens ERTEC 200P-2 Manual

2.3.9.4.1.1 Reset Timing (PowerOn Reset)

2.3.9.4.2 Asynchronous Hardware Reset

The hardware reset is triggered with the XSRST pin by the external debugger. XSRST is
a bidirectional IO cell with an open drain output. The complete internal logic is reset in the
active XSRST phase, but not the clock system. The configurations pins are also not
latched. During this hardware reset phase, the debugger can communicate with the em-
bedded ICE logic over the JTAG interface, for example to load a breakpoint. Single step-
ping is therefore possible from the reset address.
A filter integrated in ERTEC 200P ensures that spikes <= 40 ns (best case) at the XRSET
input are suppressed.
The PWRON_HW_RES bit in RES_STAT_REG is set during a hardware reset to allow
an analysis of the reset event after a system restart. This bit is not affected by the reset
function triggered. Upon restart, the software can read RES_STAT_REG (see
2.3.10.9.22).
When booting after a hardware reset, the system uses the boot mode latched internally
during the PowerOn reset.
XSRST is activated for the debugger if a PowerOn reset is active. XSRST must never be
activated with 'RES_SOFT_ARM926_CORE', as this would prevent the debugger from
running while one of the two cores was in reset.

2.3.9.4.3 Asynchronous JTAG Reset

The JTAG reset is triggered with the XTRST pin by the external debugger. Only the Em-
bedded ICE logic of the ARM926EJ-S is reset. To ensure that this Embedded ICE logic
enters a defined state in operation without a debugger, it is also reset by a PowerOn
reset (XRESET). An internal logic operation is implemented for this purpose . A filter
integrated in ERTEC 200P ensures that spikes <= 40 ns (best case) at XTRST are sup-
pressed. A spike at XTRST is not usually forwarded to the JTAG controller as this would
require a sequence over TDI/TMS and TCK.
Note for HW-Development:
For rules for the external pull circuit for the XTRST pin, see 0.
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Technical data subject to change Version 1.0