Siemens ERTEC 200P-2 Manual page 379

Enhanced real-time ethernet controller
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7
reserved
31dt1
PULSE_DUR
6
Register:
Bits:
Description:
Bit
Identifier
0
SYN_RES_PER_IF
1
SYN_RES_HOST
2
SYN_RES_PN_IP
SYN_RES_RS_CONTROLLE
3
R
Register:
Bits:
Description:
Bit
Identifier
0
ARM926_WDOG_RES
Copyright © Siemens AG 2016. All rights reserved
Technical data subject to change
0h
0h
SYN_RES_CTRL_REG
31dt0
Reset value: 0h
Control register for synchronous ERTEC 200P reset
Reset
xh
xh
xh
xh
RES_STAT_REG
31dt0
Reset value: 4h
Status register for ERTEC 200P reset
Only the bit for the most recent reset event is ever set. The
two other bits are reset.
Reset
xh
379
r
w
h
Pulse duration for SW resets
RES_SOFT, RES_SOFT_PN,
ARM926 watchdog reset
TRES_PULSE = (8 x n + 8) x TCLK
TCLK: APB clock period (1/125 MHz
r
w
= 8 ns)
h
n: Value of PULSE_DUR (0 .. 65535)
The integrated PHYs require a reset
duration of - 100 us.
n - 1562 must therefore be set
Address: 10h
Attribu-
tes:
Attr. Function / Description
0: No synchronous reset with PER-IF
r w
1: Synchronous reset with PER-IF
(retentive)
0: No synchronous reset with host
interface
r w
1: Synchronous reset with host inter-
face (retentive)
0: No synchronous reset with PN-IP
r w
1: Synchronous reset with PN-IP
(retentive)
0: No synchronous reset with RS
controller
r w
1: Synchronous reset with RS control-
ler (retentive)
Address: 14h
Attribu-
tes:
Attr. Function / Description
r
1: The last reset was with the
r
w
rh
ERTEC 200P-2 Manual
Version 1.0

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