Ahb Interfaces; Job Priorities; Details - Siemens ERTEC 200P-2 Manual

AHB interfaces

2.3.4.1.1
The GDMA controller contains two AHB interfaces: The AHB Master Interface of the
GDMA is used for data transfer from the DMA source address to the DMA destination
address. This interface also serves for access to the DMA RAM.
The AHB Slave Interface of the GDMA is used as access to the GDMA registers. When
the GDMA controller is configured for an internal DMA RAM, this interface also serves for
access from the CPU or from the GDMA AHB Master to this RAM. As mentioned above,
the DMA RAM is used for programming of the transfer list. The GDMA registers serve for
programming and status monitoring of the GDMA controller.

2.3.4.1.2 Job priorities

Each job has its own programmable priority. The DMA job can be started either by HW or
by SW. The started job with the highest priority begins to run (if other conditions, de-
scribed later, are fulfilled). When a job is running and a job with a higher priority is started,
the running job is interrupted and the job with higher priority begins to run. After the job
with the higher priority is finished, the interrupted job will continue. A higher value of
JOB_PRIO means a higher priority. If several jobs have the same value of JOB_PRIO,
then the job priority is defined by the job number. In that case the smaller job number
means a higher priority.

2.3.4.1.3 Details

2.3.4.1.3.1 Blocks
The GDMA controller consists of the following blocks:
GDMA Controller Core – Controls DMA transfers via the AHB Master IF
AHB Master Handler – HW block of AHB Master IF
AHB Slave Handler – HW block of AHB Slave IF
GDMA registers – the DMA Control registers serve for global configuration
of the GDMA, the Job Control registers serve for job programming and the
Status registers serve for monitoring of the DMA status. The address
space of the GDMA registers is parameterizable, defined by the maximum
number of DMA jobs. The word size of the registers is 32 bits.
DMA RAM serves for transfer list programming and can be configured by a
constant in VHDL code; either as an internal RAM or as an external RAM.
The address space of the DMA RAM is programmable. It is defined by the
DMA Control register, see below. The word size of the DMA RAM is 32
bits.
HW Peripheral MUX – selects one of „n" job-starting input signals from the
PROFINET-IP (3x Application Timer Block Modul), the Timer Unit and
GPIO input signals. The input selection is programmable through the Job
Control registers. The maximum number of job-starting input signals is pa-
rameterizable up to 64.
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Technical data subject to change
104 ERTEC 200P-2 Manual
Version 1.0