Interrupt Sources For Arm-Fiq; High-Priority Interrupts For Debugging; Table 10: Host Intb, Interrupt Sources - Siemens ERTEC 200P-2 Manual

Enhanced real-time ethernet controller
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In the address area of the EMC, the XCE_PER(3:0) outputs become active and the
Memory Controller waits for the XRDY_PER input signal. The confirmation delay monitor-
ing activated in the Async Wait Cycle Config Register (see chap. 2.3.5.8) after
((MAX_EXT_WAIT + 1) x 16) AHB clock pulses creates an internal ready signal for the
Memory Controller and an IRQ. The IRQ will be removed when the QVZ monitoring is
disabled.
2.3.2.15

Interrupt sources for ARM-FIQ

The Interrupt contoller will have interrupts from the following function blocks:
IRQ
Interrupt Name
no.
0
Default interrupt
1
FIQ_SEL_1
2
FIQ_SEL_2
3
FIQ_SEL_3
4
FIQ_SEL_4
5
FIQ_SEL_5
6
FIQ_SEL_6
7
FIQ_SEL_7
Type ***)
This type is dependent on the Type of ARM-IRQ. It can be ET/F or ET/R or LT.
Information:
The FIQ interrupt output of ARM-ICU (CUFIQ_O) is inverted and connected to the inter-
rupt input (nFIQ) of ARM926EJ-S.
2.3.2.15.1

High-priority Interrupts for Debugging

As effective RT debugging, the interrupts of the embedded ICE RT communication chan-
nel (
COMMRX926, COMMTX926)
FIQ7. This allows interrupt routine debugging.
Copyright © Siemens AG 2016. All rights reserved
Technical data subject to change
Ty-
Signal
pe
-
Default Vector
***)
***)
***)
***)
***)
***)
***)

Table 10: Host INTB, Interrupt sources

or the interrupt of UART2 can be mapped over FIQ1 to
69
Cause
Interrupt which is never as-
signed (must be tied to '0' on
toplevel)
Selectable interrupt from the INTA-
Sources about FIQ_SEL_1 Register
Selectable interrupt from the INTA-
Sources about FIQ_SEL_2 Register
Selectable interrupt from the INTA-
Sources about FIQ_SEL_3 Register
Selectable interrupt from the INTA-
Sources about FIQ_SEL_4 Register
Selectable interrupt from the INTA-
Sources about FIQ_SEL_5 Register
Selectable interrupt from the INTA-
Sources about FIQ_SEL_6 Register
Selectable interrupt from the INTA-
Sources about FIQ_SEL_7 Register
Interrupt
source
ERTEC 200P-2 Manual
Version 1.0

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