Detailed Address Mapping - Siemens ERTEC 200P-2 Manual

Enhanced real-time ethernet controller
Table of Contents

Advertisement

2.5 Detailed Address Mapping

Seg
Address-Range
0x0000_0000h
0x0000_1FFFh
0x03FF_FFFFh
0x0000_0000h
0x0003_FFFFh
0
0x0404_0000h
0x07FF_FFFFh
0x0800_0000h
0x0803_FFFFh
0x0804_0000h
0x0FFF_FFFFh
0x1000_0000h
0x105F_FFFFh
0x1060_0000h
0x107F_FFFFh
0x1080_0000h
0x109F_FFFFh
0x10A0_0000h
0x10AF_FFFFh
1
0x10D0_0000h
0x10DF_FFFFh
0x10E0_0000h
0x10EF_FFFFh
0x10F0_0000h
0x10FF_FFFFh
0x1100_0000h
0x110F_FFFFh
0x1110_0000h
14
After a reset, the boot ROM is at address 0. The first 64 MByte of EMC-SDRAM or EMC asyn memory (chip select
Bank0) can also be mapped to address 0 with the MEM_SWAP register in the SCRB (see 2.3.10.9.22).
15
ARM926 I-TCM can only be accessed internally from the ARM926 and not over the AHB. After activation, this ad-
dress range is no longer shown at the AHB. This range can also be shown at other addresses with alignment in seg-
ment 0, however not in the ARM926 D-TCM or ARM966 D-TCM area.
Copyright © Siemens AG 2016. All rights reserved
Technical data subject to change
Memory/
Peripheral
ARM926 subsystem
...
Boot ROM (8 KByte)
EMC (64 MByte)
15
...
ARM926 I-TCM
...
Not used
...
ARM926 D-TCM
...
Not used
...
ARM-ICU
...
PN-IP
PerIF
...
(consistency buffer)
GDMA
...
(register, JOB SRAM)
...
EMC register
...
ETB11 memory
...
ETB11 register
...
Not used
Not used
Size /Byte
MEM_SWAP parameter assignment:
00b: -> Boot ROM (0 - 8 KByte), imaged
8 KByte
01b: -> EMC SDRAM (0 - 64 MByte)
64 MByte
10b: -> EMC asyn memory (0 - 64 MByte)
11b: -> QVZ Error
After ARM926 I-TCM activation (in the CP15
c9 register):
256 KByte
ARM 926 I-TCM (0 – 256 KByte physical. /
Step 64 KByte; not imaged);
< 64 MByte
ARM 926 D-TCM (0 – 256 KByte physical. /
256 KByte
Step 64 KByte; not imaged);
< 128 MByte
AHB peripherals
ARM926 Interrupt Controller;
6 MByte
5 MByte physical;
2
2 MByte
2 MByte physical; 2
com. access:
2 MByte
appl. access:
GDMA Register and internal
GDMA Job SRAM (Size: 4608 bytes)
1 MByte physical; 2
1 MByte
Register:
JOB SRAM:
Not used:
EMC register;
1 MByte
1 MByte physical;
not imaged;
ETB11 memory;
1 MByte
8 KByte physical;
2
ETB11 register;
1 MByte
512 byte physical;
2
1 MByte
1 MByte physical;
not imaged;
239 MByte
422
Description
0
* imaged;
0
* imaged;
128 KByte physical; 2
64 KByte physical; 2
0
* imaged;
10A0_0000..10A0_00AF
10A0_00B0..10A0_12AF
10A0_12B0..10AF_FFFF
7
* imaged;
11
* imaged;
ERTEC 200P-2 Manual
14
F
F
4
* imaged
5
* imaged
Version 1.0

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

Ertec 200p

Table of Contents