Boot Mode 7 (Booting With External Host) - Siemens ERTEC 200P-2 Manual

A reload function cannot be provided in the primary boot loader for reading from an SPI
flash memory as the number of addresses to be transferred is not known, and universal
access therefore cannot be set. This must be done using the secondary boot loader.

Boot Mode 7 (Booting with External Host)

2.3.1.5.4
After reset, the ARM926 starts the instruction fetches from the primary boot loader. The
basic XHIF configurations (16/32-bit bus, XHIF_ACC_MODE, XHIF_POL_RDY) are
latched to the CONFIG_REG register after reset (see 2.3.10.9.3) and wired directly to the
XHIF module. The parameter settings (for example page sizes, ...) at XHIF are made by
the external host in the XHIF control registers. The ERTEC 200P signals readiness for
firmware upload to the host with a software handshake (boot loader functionality, sema-
phore) (ready for firmware upload). At address D-TCM+0x40 (address 0x0803_0040 in
block 3 of the D-TCM) , the OK identifier = 0x6879_9786 (software handshake) and the
first OP code of the secondary boot loader is processed from address D-TCM+0x44 (ad-
dress 0x0803_0044 in block 3 of the D-TCM).
Once reset is inactive, the primary boot loader also sets the XHIF interface in line with the
ConfigPins in the XHIF_Config register with the selected XHIF_CPU_Width,
XHIF_POL_RDY and XHIF_ACC_Mode and enables XHIF_PAGE0 with a width of 1M for
access to the D-TCM. Other XHIF pages are not changed. The primary boot loader sets
the address D-TCM+0x40 (address 0x0803_0040 in block 3 of the D-TCM) to
0x0000_0000 (not OK) and waits until OK identifier = 0x6879_9786 is entered by the
external host.
SW code download from the XHIF must be actively executed by the external host pro-
cessor. The boot code can be transferred from the XHIF host to the D-TCM (block 3) of
the ERTEC 200P. At the end of data transfer, the XHIF host sets identifier 0x6879_9786
at address D-TCM+0x40 (semaphore address). Once the semaphore has been set, the
ERTEC 200P maps the D-TCM to I-TCM (TCM926_MAP, see 2.3.10.9.14) and the sec-
ondary boot loader is started at address 0x0000_0044 (I-TCM). Access to the I-TCM
over XHIF is not possible; only the D-TCM can be addressed.
Detection of ERTEC 200P readiness (for XHIF boot) by the external host
For an external host processor to recognize whether the XHIF interface is ready, the
following procedure must be observed:
The external host polls the XHIF range register of bank 0 until the value 0x0010_0000
(1 MByte range) appears. The reset value of the XHIF range register is 0x0000_0000.
Access to this register is possible even during an active reset. If the external host reads
the correct XHIF range register value (0x0010_0000), it then reads the offset for Page0,
which must then contain the value 0x0800_0000. The host then reads the semaphore at
D-TCM+0x40 (address 0x0803_0040 in block 3 of the D-TCM) until it returns the value
0x0000_0000.
To ensure that access over XHIF to the D-TCM (block 3) is possible, the external host
writes the address 0x0803_0044 of the D_TCM and reads back the value. If the value
written has been read back correctly, transfer of the secondary boot loader can start. At
the end of data transfer, the XHIF host sets identifier 0x6879_9786 at address D-
TCM+0x40 (address 0x0803_0040 in block 3 of the D-TCM) (semaphore address).
Note for module development
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Technical data subject to change Version 1.0