Siemens ERTEC 200P-2 Manual page 398

21dt2
G11: DR_EMC_XAV_BF
0
EMC_SDRAM_CLK_SD0SD1
22
_EBL
EMC_SDRAM_CLK_SD2_EB
23
L
24 EMC_BF_CLK_BF0BF1_EBL 0h
25 EMC_BF_CLK_BF2_EBL
Register:
Bits:
Description:
Bit Identifier
1dt0 DR_GPIO0
3dt2 DR_GPIO1
5dt4 DR_GPIO2
7dt6 DR_GPIO3
9dt8 DR_GPIO4
11dt1
DR_GPIO5
0
13dt1
DR_GPIO6
2
15dt1
DR_GPIO7
4
17dt1
DR_GPIO8
6
19dt1 DR_GPIO9
Copyright © Siemens AG 2016. All rights reserved
Technical data subject to change
3h
1h
1h
0h
DRIVE15_0GPIO
31dt0 Reset value:
SCRB Drive Current of GPIO Signals
Each GPIO bit is set to the drive current on the basis of the
following coding
00 - 4 mA
01 - 6 mA
10 - 8 mA
11 - 12 mA
Reset
1h
1h
1h
1h
1h
1h
1h
1h
1h
1h
398
r w Signal list: XAV_BF
enable(=1) / disable(=0)
CLK_O_SDRAM0 and
r w
CLK_O_SDRAM1 (one SDRAM
block)
enable(=1) / disable(=0)
r w CLK_O_SDRAM2 (with 2nd SDRAM
block)
enable(=1) / disable(=0) CLK_O_BF0
r w
and CLK_O_BF1 (one flash block)
enable(=1) / disable(=0) CLK_O_BF2
r w
(with 2nd flash block)
Address: 7Ch
5555555 Attribu-
5h tes:
Attr. Function / Description
r w drive current GPIO0
r w drive current GPIO1
r w drive current GPIO2
r w drive current GPIO3
r w drive current GPIO4
r w drive current GPIO5
r w drive current GPIO6
r w drive current GPIO7
r w drive current GPIO8
r w drive current GPIO9
r w
ERTEC 200P-2 Manual
Version 1.0