Table of Contents
Advertisement
Register:
MASKREG0
Bits:
31dt0
Description:
Register:
MASKREG1
Bits:
31dt0
Description:
Register:
MASKREG2
Bits:
31dt0
Description:
Register:
IRR0
Bits:
31dt0
Description:
Register:
IRR1
Bits:
31dt0
Description:
Copyright © Siemens AG 2016. All rights reserved
Technical data subject to change
Reset value:
Interrupt Mask Register
Enable/disable the interrupt inputs
0 – 31 inputs of the interrupt controller
0' = Interrupt input enabled
'1' = Interrupt input disabled
Reset value:
Interrupt Mask Register
Enable/disable the interrupt inputs
32 – 63 inputs of the interrupt controller
0' = Interrupt input enabled
'1' = Interrupt input disabled
Reset value:
Interrupt Mask Register
Enable/disable the interrupt inputs
64 – 95 inputs of the interrupt controller
0' = Interrupt input enabled
'1' = Interrupt input disabled
Reset value:
Request Register
Flag for the Interrupt Request detected as result of a positive edge
0 – 31 inputs of the interrupt controller
'0' = No request
'1' = Request has occurred
Reset value:
Request Register
Flag for the Interrupt Request detected as result of a positive edge
32 – 63 inputs of the interrupt controller
'0' = No request
'1' = Request has occurred
FFFFFFFFh
FFFFFFFFh
FFFFFFFFh
00000000h
00000000h
78
Address:
5000h
Attributes:
r
Address:
5004h
Attributes:
r
Address:
5008h
Attributes:
r
Address:
5100h
Attributes:
rh
Address:
5104h
Attributes:
rh
ERTEC 200P-2 Manual
Version 1.0
w
w
w
- Quick Links:
- Overview of the Ertec 200P
Hide quick links:
Advertisement
Table of Contents
