Siemens ERTEC 200P-2 Manual page 7

2.3.2.5.2 Monitoring at the APB Side ............................................................................................52
2.3.2.5.3 Monitoring at the EMC ....................................................................................................52
2.3.2.5.4 Monitoring in the Individual Modules ...............................................................................52
2.3.2.6 Overview .............................................................................................................................54
2.3.2.7 Interface ..............................................................................................................................54
2.3.2.8 Interrupt acquisition ..............................................................................................................55
2.3.2.9 Interrupt masking / priorisation .............................................................................................57
2.3.2.10 Interrupt post-processing ..................................................................................................58
2.3.2.11 Special functions ..............................................................................................................59
2.3.2.12 Debug functions ...............................................................................................................59
2.3.2.13 Miscellaneous ..................................................................................................................59
2.3.2.13.1 Synchronizing the inputs ..............................................................................................59
2.3.2.13.2 Bus interface ................................................................................................................60
2.3.2.13.3 Sequences ...................................................................................................................60
2.3.2.13.4 Operating rules ............................................................................................................61
2.3.2.13.5 Startup/shutdown .........................................................................................................62
2.3.2.14 Interrupt sources for ARM-IRQ .........................................................................................63
2.3.2.14.1 Interrupts for accesses to missing addresses ...............................................................68
2.3.2.14.2 Confirmation delay in the Memory Controller (EMC) address area ................................68
2.3.2.15 Interrupt sources for ARM-FIQ .........................................................................................69
2.3.2.15.1 High-priority Interrupts for Debugging ...........................................................................69
2.3.2.16 Address Mapping .............................................................................................................70
2.3.2.17 Register description .........................................................................................................76
2.3.3 Host ICU (PerIF: Event Unit) ..................................................................................................103
2.3.4 GDMA (Direct Memory Access) .............................................................................................103
2.3.4.1 GDMA Function Description ...............................................................................................103
2.3.4.1.1 AHB interfaces .............................................................................................................104
2.3.4.1.2 Job priorities ................................................................................................................104
2.3.4.1.3 Details..........................................................................................................................104
2.3.4.1.4 Usage ..........................................................................................................................114
2.3.4.1.5 Result ..........................................................................................................................115
2.3.4.1.6 Memory ........................................................................................................................116
2.3.4.1.7 Interrupts .....................................................................................................................117
2.3.4.2 ERTEC 200P GDMA Use Cases ........................................................................................117
2.3.4.2.1 Using the Job Start and HW_REQ Signal List ...............................................................117
2.3.4.2.2 DMA with UART Interface ............................................................................................125
2.3.4.3 GDMA-IP Bugs ..................................................................................................................125
2.3.4.4 Address Mapping ...............................................................................................................126
2.3.4.5 Register Description ...........................................................................................................129
2.3.5 EMC (External Memory Controller).........................................................................................157
2.3.5.1 Block Diagram of the EMC .................................................................................................158
2.3.5.2 EMC Reset and Clock ........................................................................................................159
2.3.5.3 AHB-Slave Interface...........................................................................................................161
2.3.5.4 EMC Notes ........................................................................................................................162
2.3.5.4.1 Remapping ..................................................................................................................162
2.3.5.4.2 Maximum number of wait cycles ...................................................................................162
2.3.5.4.3 Shift Mode with the Asynchronous EMC Interface ........................................................162
2.3.5.4.4 Control of an External Driver ........................................................................................163
2.3.5.4.5 QVZ Acknowledgement Delay ......................................................................................163
2.3.5.5 Timing of the Asynchronous Memory Interfaces .................................................................164
2.3.5.5.1 Read Access ................................................................................................................164
2.3.5.5.2 Write Access ................................................................................................................165
2.3.5.6 Application examples .........................................................................................................166
2.3.5.7 Interface signals .................................................................................................................167
2.3.5.8 Address Mapping ...............................................................................................................169
2.3.5.9 Register description ...........................................................................................................170
2.3.6 Host Interface - Parallel (XHIF)..............................................................................................182
2.3.6.1 Block Diagram of the Host Interface ...................................................................................182
2.3.6.2 Function Description (XHIF) ...............................................................................................183
2.3.6.2.1 AHB Master Interface ...................................................................................................186
2.3.6.2.2 APB Slave Interface .....................................................................................................186
2.3.6.2.3 XHIF Configuration .......................................................................................................186
2.3.6.2.4 Application Information .................................................................................................187
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Technical data subject to change
7 ERTEC 200P-2 Manual
Version 1.0