Siemens ERTEC 200P-2 Manual page 254

30 APB_WRITE
31 ERR_LOCK
Register: FILT_RELOAD_0
Bits: 9dt0
Description:
Register: FILT_RELOAD_1
Bits: 9dt0
Description:
Register: FILT_RELOAD_2
Bits: 9dt0
Description:
Register: FILT_RELOAD_3
Bits: 9dt0
Description:
Register: FILT_RELOAD_4
Bits: 9dt0
Description:
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Technical data subject to change
0h rh w
0h rh w
Reset value:
Load value of clock divider 0
The division factor reduced by 1 is entered here. Load value 0x000
is converted to 0x001 by the HW.
Reset value:
Load value of clock divider 1
The division factor reduced by 1 is entered here. Load value 0x000
is converted to 0x001 by the HW.
Reset value:
Load value of clock divider 2
The division factor reduced by 1 is entered here. Load value 0x000
is converted to 0x001 by the HW.
Reset value:
Load value of clock divider 3
The division factor reduced by 1 is entered here. Load value 0x000
is converted to 0x001 by the HW.
Reset value:
Load value of clock divider 4
01: Halfword access
10: Word access
11: reserved
0: Read access
1: Write access
Set to 1 by the HW if erroneous APB ac-
cess is detected. This blocks further HW
entries.
The SW (PNB stack) must reset the bit to
0 to enable new entries.
000h
000h
000h
000h
000h
254
Address: Ch
Attributes: r w
Address: 10h
Attributes: r w
Address: 14h
Attributes: r w
Address: 18h
Attributes: r w
Address: 1Ch
Attributes: r w
ERTEC 200P-2 Manual
Version 1.0