Siemens ERTEC 200P-2 Manual page 433

ERTEC 200P
XCS_PER3 -
XWR -
XRD -
XRDY_PER -
DTXR -
XOE_DRIVER -
CLK_O_SDRAM0 -
CLK_O_SDRAM1 -
CLK_O_SDRAM2 -
CLK_I_SDRAM -
Copyright © Siemens AG 2016. All rights reserved
Technical data subject to change
3V3
Dir Buffer
1V8
bidi
1V8
TWC1BC18ALV04SZ
bidi
1V8
TWC1BC18ALV04SZ
bidi
1V8
TWC1BC18ALV04SZ
in
1V8
TWC1IC18AS
bidi 1V8
TWC1BC18ALV04SZ
bidi 1V8
TWC1BC18ALV04SZ
out 1V8
TWC1BC18ALV04SZ
out 1V8
TWC1BC18ALV04SZ
out 1V8
TWC1BC18ALV04SZ
in 1V8
TWC1IC18AS
433
DS CL int. fout
(mA (pF Pul (MHz
) ) l )
bid
*)
i G7 42 - 1
bid
*)
i G6 42 - 42
bid
*)
i G6 42 - 42
bid
i - - UP -
bid
*)
i G1 42 DN 42
bid
*)
i G1 42 UP 1
bid
*)
i G8 42 - 125
bid
*)
i G8 42 - 125
bid
*)
i G8 42 - 125
bid
i - - - -
ERTEC 200P-2 Manual
Version 1.0
Description
EMC Bank 3 Chip Select
1 -
REE DFT Input
EMC Write Signal
0.1 -
REE DFT Input
EMC Read Signal
0.1 -
REE DFT Input
- - EMC Ready Signal
EMC Direction for ext.
Driver
0.1 - Boot(0)
EMC Enable for ext.
Driver
1 - Boot(1)
1 - Feedback clock output
clock for the SDRAM
1 - device
clock for the SDRAM
1 - device
Feedback clock for syn-
chronization of read data.
MUST be connected,
- - even if SDRAM is not
#
1
1
1
1
1
1
1
1
1
1