Siemens ERTEC 200P-2 Manual page 42

Enhanced real-time ethernet controller
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No
No
No
No
Flow chart for the external host for establishing XHIF interface enable
Copyright © Siemens AG 2016. All rights reserved
Technical data subject to change
Start
ERTEC200P reset
Host read XHIF range
register bank 0
Value ==
0x0010_0000
Host read XHIF-R offset
register bank 0
Value ==
0x0800_0000
Yes
Host read D-TCM+0x40
(page 0)
Value == 0x00
Host write test data to D-
TCM+0x44 (page 0)
Yes
Host read test data back
from D-TCM+0x44
(page 0)
Value ==
expectedValue
XHIF Ready
ARM 926 primary boot
initializer XHIF interface
(DTCM on XHIF page 0),
waits for semaphore
0x6879_9786 at address
boot RAM start+0x40
Note:
ARM 926 polls address boot RAM
start+0x40 until the data item
0x6879_9786 is read
Note:
After the 0x6879_9786 boot RAM
start+0x40 write operation of the ARM
926, the system switches from D-TCM to I-
TCM at address 0x0000.0000 and there is
a jump to address 0x0000.0044
XHIF is ready and the
external host can configure
additional pages
42
ERTEC 200P-2 Manual
Version 1.0

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