2.3.10.9 SCRB (System Control Register Block)
This block contains central registers for controlling the ERTEC 200P
Hardware Identifier Register
2.3.10.9.1
Contains the identification number of the ERTEC 200P and the target platform
(ASIC/FPGA), and the versioning in ClearCase (ID_REG, ERTEC 200PLUS_TAG).
31 .. 21
11
Identification
IRTE,ICU,DSA,...
Unique number
per module,
managed central-
ly in the A&D IP
list.
A number can
consist of a "ma-
jor" and "minor"
number.
Copyright © Siemens AG 2016. All rights reserved
Technical data subject to change
32-bit register
20 .. 19
18 .. 16
2
Target Plat-
Patch Label
form
ASIC,FPGA,
....
Gray-coded
For labeling
metal fixes
in the ASIC
flow; only
valid if plat-
form =
ASIC. In-
crement/R
Label is then
invalid
000 = no
00 = ASIC
patch yet
001 = 1st
01 = FPGA
patch
10 = re-
etc. (Gray-
served
coded)
11 = user
defined
Table 21: ERTEC 200P, ID register
15 .. 11
3
Increment
ClearCase
increment
Represents
the HDL in-
crement value
of the Clear-
Case label
365
.
10 .. 0
5
R Label
ClearCase HDL
label
Represents the HDL
counter value of the
ClearCase label
ERTEC 200P-2 Manual
11
Version 1.0