Siemens ERTEC 200P-2 Manual page 174

6dt4 R_HOLD
12dt7 R_STROBE
16dt13 R_SU
19dt17 W_HOLD
25dt20 W_STROBE
29dt26 W_SU
30 EW
31 WSM
Register: ASYNC_BANK2
Bits: 31dt0
Description:
Bit Identifier
1dt0 SIZE
3dt2 MODE
Copyright © Siemens AG 2016. All rights reserved
Technical data subject to change
7h r
3Fh r
Fh r
7h r
3Fh r
Fh r
0h r
0h r
Reset value:
Async. Bank 2 Configuration register
Reset Attr.
2h r
0h r
11 = Burstflash ROM
Read Hold Cycles
w Hold Phase of read access lasts (R_HOLD +
1) clocks.
Read Strobe Duration Cycles
Strobe Phase of read access (Read Enable =
w
0) lasts (R_STROBE + 1) clocks.
Value 0 is not supported.
Read Setup Cycles
w Setup Phase of read access lasts R_SU
clocks.
Write Hold Cycles
w Hold Phase of write access lasts (W_HOLD +
1) clocks.
Write Strobe Duration Cycles
w Strobe Phase of write access (Write Enable =
0) lasts (W_STROBE + 1) clocks.
Write Setup Cycles
w Setup Phase of write access lasts W_SU
clocks.
Extend Wait mode
0 = WAIT input = don't care
w
1 = Wait input extends access (valid in
SRAM mode only)
Wait input synchronisation mode
w 0 = 2 Flipflops
1 = 1 Flipflop
3FFFFFF2h
Function / Description
Bank Size
00 = 8 bit device
w 01 = 16 bit device
10 = 32 bit device
11 = reserved
Mode
00 = SRAM
w 01 = Pagemode ROM
10 = reserved
11 = Burstflash ROM
174
Address: 18h
Attributes: r w
ERTEC 200P-2 Manual
Version 1.0