Siemens ERTEC 200P-2 Manual page 395

Enhanced real-time ethernet controller
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4
SCRB_ACCESS_ERR
5
reserved
6
reserved
Register:
Bits:
Description:
Bit
Identifier
31dt0 RETURN_ADDRESS
Register:
Bits:
Description:
Bit
Identifier
0
EN_P1_XLINK_STATUS
1
EN_P1_XACTIVITY
2
EN_P2_XLINK_STATUS
3
EN_P2_XACTIVITY
Copyright © Siemens AG 2016. All rights reserved
Technical data subject to change
xh
xh
xh
RES_SOFT_RETURN_ADDR
31dt0
Reset value: 0h
Vector address for the secondary boot loader following an
ARM926EJ-S SW reset
Reset
xh
PHY_LED_CONTROL
31dt0
Reset value: 0h
PHY-LED control
Reset
xh
xh
xh
xh
395
HOST IF
0: No access error has occurred in
the SCRB
r
w
h
1: An access error has occurred in the
SCRB
r
w
h
r
w
h
Address: 6Ch
Attribu-
tes:
Attr. Function / Description
Vector address for the secondary
boot loader following
RES_SOFT_ARM926_CORE. This
r w
SW reset is executed in the
TCM926_MAP register after TCM 926
configuration.
Address: 70h
Attribu-
tes:
Attr. Function / Description
0: LED: P1_XLINK_STATUS is con-
trolled by the PHY
r w
1: LED: P1_XLINK_STATUS is con-
trolled by the SW
0: LED: P1_XLINK_XACTIVITY is
controlled by the PHY
r w
1: LED: P1_XLINK_XACTIVITY is
controlled by the SW
0: LED: P2_XLINK_STATUS is con-
trolled by the PHY
r w
1: LED: P2_XLINK_STATUS is con-
trolled by the SW
r w 0: LED: P2_XLINK_XACTIVITY is
r
w
(r)(h
(w)
)
ERTEC 200P-2 Manual
Version 1.0

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