Siemens ERTEC 200P-2 Manual page 412

Register:
Bits:
Description:
Bit Identifier
0 SPI1_PARITY_ERR
1 SPI2_PARITY_ERR
Register:
Bits:
Description:
Bit Identifier
0 XHIF_MODE
Register:
Bits:
Description:
Bit Identifier
0 CS0_ENABLE
Copyright © Siemens AG 2016. All rights reserved
Technical data subject to change
SPI_PARITY_ERROR
31dt0 Reset value: 0h
SPI1/2 parity error (there is only a parity check when SPI
data are read in the address range with APB address
bits(10dt9) = 01)
Reset
0h
0h
XHIF_MODE
31dt0 Reset value: 0h
Umschalten XHIF-Pin zwischen XHIF_A20 und
XHIF_XCS_R
Reset
0h
EXT_DRIVER_EN
31dt0 Reset value: 0h
Reset
0h
412
Address: B0h
Attribu-
tes:
Attr. Function / Description
r
w 1: Parity-Error SPI1 (Even Parity)
h
r
w 1: Parity-Error SPI2 (Even Parity)
h
Address: B8h
Attribu-
tes:
Attr. Function / Description
The input pin XHIF_XCS_R_A20 is
used as
0: Page register chip select
(XHIF_XCS_R)
1: Address line (XHIF_A20)
r w
(The XHIF input not used is switched
to inactive, i.e. XHIF_A20='0',
XHIF_XCS_R='1')
Address: BCh
Attribu-
tes:
Attr. Function / Description
1: CS0 activates XOE_DRIVER
0: CS0 has no effect on
r
XOE_DRIVER
w
h
When the reset is cleared, the invert-
ed value of XRDY_BF is latched.
rh w
r w
r(h) w
ERTEC 200P-2 Manual
Version 1.0