Siemens ERTEC 200P-2 Manual page 469

Enhanced real-time ethernet controller
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T
SFRMIN Setup Time
SFRMS
T
SFRMIN Hold Time
SFRMH
Buffer Driverstrength = 9mA
Based on
1)
C
= 20 pF
L
2)
Ts, Th > 1 x 125 MHz period; Inputs are synchronized with APB-Clock (F
3)
Slave-Mode : SCLK_IN is synchronized in (2 internal clocks)
Operation without SPI_FRAME_N:
If the ERTEC 200P is connected as SPI slave to a standard controller (SPI master) that does not
support the SPI_FRAME_N signal, the ERTEC 200P is to be set as follows:
Configuration of Motorola format: SSPCR0.FRF = '00' (see 2.3.10.7.7)
Configuration of the SPI clock phase: SSPCR0.SPH = '1' (see 2.3.10.7.7)
GPIO pin SPI_FRAME_N (see 3.2)
Connect with ext. pull-down
Connect with int. pull-down (PULLxx_yyGPIO = "11", see 2.3.10.9.15.2)
Do not select the alternate function (blocking value = '0' is active)
Please note the following restrictions in this operating mode:
In the SPI status register, SSPSR.BSY (see 2.3.10.7.7) is not reset at the end of the transfer
Following a RESET (see 0), "zero data" are transferred when the first character (4-bit...16-bit,
SSPCR0.DSS) is transferred from the SPI slave to the SPI master (return direction).
Copyright © Siemens AG 2016. All rights reserved
Technical data subject to change
17.5
-
9.0
-
).
SSPCLK
469
ns
ns
AND
AND
OR
OR
ERTEC 200P-2 Manual
Version 1.0

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