Siemens ERTEC 200P-2 Manual page 179

2 AVD_MODE
3 BF_CDV
7dt4 reserved_1
10dt8 RM
13dt11 reserved_2
14 RDY_DELAY
15 SYNC_READ
19dt16 AVD_DELAY
22dt20 AVD_PW
23 reserved_3
31dt24 reserved_4
Register: PM_CONFIG
Bits: 31dt0
Description:
Copyright © Siemens AG 2016. All rights reserved
Technical data subject to change
0h r
0h r
0h r
0h r
0h r
0h r
0h r
0h r
0h r
0h r
00h r
Reset value:
Pagemode ROM Configuration register
0 = Burstflash Clock always at fixed level
defined in bit 3
1 = Burstflash clock toggles
Address Valid output mode
0 = AVD always low
1 = AVD toggles
Clock Disable Value
0 = Burstflash Clock fixed level = 0
1 = Burstflash Clock fixed level = 1
reserved
Read Mode
000 = Continuos
001 = 8-word linear without wrap around
010 = 16-word linear without wrap around
011 = 32-word linear without wrap around
100 = reserved
101 = 8-word linear with wrap around
110 = 16-word linear with wrap around
111 = 32-word linear with wrap around
reserved
Ready Delay Mode
0 = RDY active with data
1 = RDY active one clock cycle before data
Set Device Read Mode
0 = Asynchronous Read Mode
1 = Synchronous Read (Burst Mode) enabled
AVD delay
0000 = 1 AHB clock
..
1111 = 16 AHB clocks
Delay after falling edge of chip select to falling
edge of AVD
AVD pulse width
000 = 1 AHB clock
..
111 = 8 AHB clocks
reserved
reserved
0000003Fh
179
Address: 30h
Attributes: r (w)
ERTEC 200P-2 Manual
Version 1.0