16-Bit Data Access Over Xhif In Buffered Mode - Siemens ERTEC 200P-2 Manual

max. multiplication factor of 16 is possible at CLKOA) and CLKOB is therefore used to
generate internal ASIC clocks, no free-running frequency is visible.

1.4.4 16-bit Data Access over XHIF in Buffered Mode

If the parallel host interface (XHIF) is used with a 16-bit data bus (8-bit data bus is not
supported in ERTEC 200P), buffered mode must be configured in XHIF_0/1_Px_CFG
for consistent 32-bit access over ML-AHB (see 2.3.6.3).
When the lower 16 bits (XHIF_A1 = '0') are read/written when buffered mode is
active, the next read/write access must always be to the higher 16 bits of the
same 4-byte address.
Background:
Reading the lower 16 bits (XHIF_A1 = '0') triggers 32-bit AHB read access with the
XHIF and the higher 16 bits read are buffered in the XHIF. The next read access with
XHIF_A1 = '1', irrespective of the higher address bits (XHIF_A2...19), always reads
the data buffered in the XHIF.
Writing to the lower 16 bits (XHIF_A1 = '0') will buffer the data in the XHIF without
storing the higher address bits (XHIF_A2...19). The next write access with XHIF_A1
= '1' always, irrespective of the higher address bits (XHIF_A2...19), triggers 32-bit AHB
write access in the XHIF. This write access always uses the data buffered in the XHIF
and the data currently pending, and applies to the address currently pending at the
XHIF and implemented at AHB.
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Technical data subject to change
23 ERTEC 200P-2 Manual
Version 1.0