Siemens ERTEC 200P-2 Manual page 172

13 CL
31dt14 reserved_4
Register: SDRAM_REFRESH
Bits: 31dt0
Description:
Bit Identifier
12dt0 REFRESH_RATE
28dt13 reserved_1
29 INIT_DONE
30 AT
31 reserved_2
Register: ASYNC_BANK0
Bits: 31dt0
Description:
Bit Identifier
1dt0 SIZE
3dt2 MODE
Copyright © Siemens AG 2016. All rights reserved
Technical data subject to change
1h r
00000h r
Reset value:
SDRAM Refresh Control register
Reset Attr.
0190h r
0000h r
0h rh
0h rh
0h r
Reset value:
Async. Bank 0 Configuration register
Reset Attr.
2h r
0h r
CAS Latency
0 = 2 clocks
1 = 3 clocks
wpt
Write protected as long as bit29 in
SDRAM_REFRESH = 0.
A write starts a Mode Register Set to external
SDRAM.
reserved
00000190h
Function / Description
Refresh Rate
w Number of clocks between 2 SDRAM Refresh
cycles = REFRESH_RATE + 1
reserved
SDRAM Initialization done
0 = default
1 = SDRAM initialization ofter Hardware Re-
set is done (needs 28670 clocks)
Async. Timeout
0 = default
1 = Async. access was finished because Wait
Cycle Counter expired.
reserved
3FFFFFF2h
Function / Description
Bank Size
00 = 8 bit device
w 01 = 16 bit device
10 = 32 bit device
11 = reserved
Mode
w 00 = SRAM
01 = Pagemode ROM
172
Address: Ch
Attributes: r(h) (w)
Address: 10h
Attributes: r w
ERTEC 200P-2 Manual
Version 1.0