Common Rd/Wr - Siemens ERTEC 200P-2 Manual

Common RD/WR

3.3.2.1.2
The following figure shows the timing, when the External Host initiates a Common Read
Access.
Parameter Description
t Write signal
RCS
serted delay
t address valid to chip select asserted setup
ACS
time
t chip select asserted to ready deasserted
CRT
delay
t chip select asserted to data enable delay
CDE
t ready active pulse width
RAP
t ready asserted to data valid delay
RTD
t chip select deasserted to write signal assert-
CWH
ed delay
t address valid to chip select deasserted hold
CAH
time
t data valid/enable to chip select deasserted
RDH
hold time
t read recovery time
RR
Tc = 8 ns (AHB Clock = 125 MHz);
Based on
Load-value for Timing = 20pF
Buffer Driverstrength = 9mA
IO-Voltage = 3,3V
Copyright © Siemens AG 2016. All rights reserved
Technical data subject to change
deasserted to chip select as-
461
Min Max
6.2 ns
2.1 ns
2.8 ns 11.7 ns
2.5 ns 11.9 ns
6.1 ns 10.2 ns
10.6 ns
0.9 ns
1.2 ns
2.5 ns 11.7 ns
8.8 ns
ERTEC 200P-2 Manual
Version 1.0