Burstmode Flash Timing - Siemens ERTEC 200P-2 Manual

t Ready
RDY_DELAY
Time
t Active data bus
ADB
t Recovery Phase
RECOV
Tc = 8 ns (AHB Clock = 125 MHz);
Based
Load-value for Timing = 20pF
on
Buffer Driverstrength = 12mA
IO-Voltage = 1.8V
1)
BANK_0-4_CONFIG register
2)
in ASYNC_BANK0...4 register; Bit 31 – WSM = '0'
3)
in ASYNC_BANK0...4 register; Bit 31 – WSM = '1'

3.3.1.2 BurstMode Flash Timing

Important:
To achieve the correct timing
configure EXTENDED_CONFIG.BFODM = '1'. EXTENDED_CONFIG.BFODM = '0' (default
value) is not permitted
configure / retain BF_CONFIG.BF_CLK_F = '0' / (default value). BF_CONFIG.BF_CLK_F =
'1' is not permitted.
The default-configuration for BurstFlash is asynchronous. The Timing is the same as for
SRAM-Interface (see chapter 3.3.1.1.1 and 3.3.1.1.2). For burst-Operation a setup is
needed in the EMC-Controller (e.g. set BF_CONFIG.SYNC_READ to 1) and Burst-
ModeFlash Device.
The Input-Signals are latched in with CLK_I_BF.
Copyright © Siemens AG 2016. All rights reserved
Technical data subject to change
Delay 1 Tc + 6.2
ns
8 ns
0 ns
454
2 Tc + 10.4 ASYNC_BANKx.EW
ns
8 ns EXTENDED_CONFIG.A
DB
120 ns RECOV_CONFIG.REC
OVx
3)
ERTEC 200P-2 Manual
Version 1.0