Questionable Event Enable Register - Iwatsu VOAC760 Manual

3.3.16 Questionable event enable register

This is a register to mask questionable event status register. Depending upon the masked result,
QES bit of standard event status register is set.
It is possible to set and read out the mask pattern by :STATus:QUESionable:ENABle[?] command.
This register is  PSC command and is settable whether it is cleared to 0 or not at the time of
power-up.
This is not affected by instrument clear and  CLS command.
Questionable event status constitution
Not used Not used
12
14
0 OVM 0 Hout Lout
AND AND AND
X X
LOG memory full
More than limit calculation upper limit
Lower than limit calculation lower limit
Resistance measurement overflow
Not used
Not used
11 9
0 OVR 0 0
AND
X X X
OR
To QES bit of status byte register
TEMP measurement overflow
Not used
Not used Not used
4
0 0 OVT 0 0
AND
Ｘ
X X X X
36
Current measurement overflow
Voltage measurement overflow
1
0
Questionable
OVC OVV event status
register
AND AND
Questionable
event enable
register