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3.3.5
Standard event status enable register
The standard event status enable register masks the standard event status register. A message is
returned to the ESB bit of the status byte register, depending on the results of masking.
The mask pattern can be set using the ESE command and read using an ESE? query.
Whether or not the contents of this register are cleared (to 0) as the power is turned on is set using
the PSC command.
This does not directly affect the GPIB instrument clear message and the CLS command.
Standard event status enable register format
Not used
7
5
PON
0
CME
AND
AND
X
To ESB bit of the status byte register
3.3.6
Output queue
The output queue is an output buffer in which the response message to the controller is stored.
Appropriate response messages are stored in the output queue, depending on the type of query.
The MAV bit of the status byte register is set to 1 so long as data of one byte or greater exists in the
output queue.
The contents of this output queue are cleared (that is, set to 0) when the power is turned on or the
instrument clear command is executed. When the output queue is not empty and a new program
message is sent before the controller reads all the data bytes, a query error occurs and the contents
of the output queue are also cleared.
When using a serial interface, the serial polling cannot be used. As a result, the MAV bit cannot be
utilized efficiently. (As the MAV bit status is read using the STB? query, the contents of the previous
queue are already sent.) Additionally, this instrument uses the full-duplex communication. Therefore,
the instrument receives the program message even though the output queue is not empty (data
sending). As a result, the query error is not given.
Not used
4
3
2
EXE
DDE
QYE
0
AND
AND
AND
X
OR
Power ON
Command error
Execution error
Unit specific error
Query error
Operation completion
0
OPC
Standard event status register
AND
Ｘ
Standard event status enable register
28
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