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3.3.10 Measurement event enable register
This register is used to mask the measurement event status register. According to the masked results,
the MEV bit of the status byte register is set.
It is possible to set the mask pattern using the :MESE command and to read it using the :MESE?
query.
Whether or not the contents of this register are cleared (set to 0) as the power is turned on is set using
the PSC command.
This setting is not affected by the instrument clear nor CLS command.
Measurement event status register format
未
使
7
6
5
用
Lout
Hout
GO
AND
AND
AND
0
0
To the MEV bit of the status byte register
3.3.11 Operation condition status register
This is a register that reports the instrument status. It is readable by :STATus:OPERation:CONDition?
query.
There is no change of the register value by reading.
This register indicates a latest status. In the case SRQ occurrence factor is to obtain, please use an
operation event status register (and enable register).
This register is 16 bit configuration and the description is as follows:
(Bit 6-15)
This instrument does not use this bit.
This bit is normally set at "0".
WTR (Bit 5)
Becomes 1 when measurement is trigger wait status.
MSR (Bit 4)
Becomes 1 during measuring status.
(Bit 0-3)
This instrument does not use this bit.
This bit is normally set at "0".
Not used
3
2
1
BLC
BLSE
0
CAL
AND
AND
AND
0
×
L
I
H
OR
M
Limit operation Lower than LOW
Limit operation Higher than HIGH
Limit operation GO
CAL completion
Logging completed in bulk mode
Stop event detected in bulk mode
Measurement completed
0
SDR
Measurement event status register
AND
Measurement event enable register
L
1
32
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