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M16C/6N Group (M16C/6NK, M16C/6NM)
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10.7 NMI Interrupt
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An NMI interrupt request is generated when input on the NMI pin changes state from high to low. The NMI
interrupt is a non-maskable interrupt.
The input level of this NMI interrupt input pin can be read by accessing the P8_5 bit in the P8 register.
This pin cannot be used as an input port.
10.8 Key Input Interrupt
Of P10_4 to P10_7, a key input interrupt request is generated when input on any of the P10_4 to P10_7
pins which has had the PD10_4 to PD10_7 bits in the PD10 register set to "0" (input) goes low. Key input
interrupts can be used as a key-on wake up function, the function which gets the microcomputer out of wait
or stop mode. However, if you intend to use the key input interrupt, do not use P10_4 to P10_7 as analog
input ports. Figure 10.14 shows the block diagram of the key input interrupt. Note, however, that while input
on any pin which has had the PD10_4 to PD10_7 bits set to "0" (input mode) is pulled low, inputs on all other
pins of the port are not detected as interrupts.
Pull-up
transistor
KI3
Pull-up
transistor
KI2
Pull-up
transistor
KI1
Pull-up
transistor
KI0
Figure 10.14 Key Input Interrupt Block Diagram
10.9 CAN0/1 Wake-up Interrupt
CAN0/1 wake-up interrupt request is generated when a falling edge is input to CRX0 or CRX1. One interrupt
is allocated to CAN0/1. The CAN0/1 wake-up interrupt is enabled only when the PortEn bit = 1 (CTX/CRX
function) and Sleep bit = 1 (Sleep mode enabled) in the CiCTLR register (i = 0, 1). Figure 10.15 shows the
block diagram of the CAN0/1 wake-up interrupt. Please note that the wake-up message will be lost.
Sleep bit in C0CTLR register
PortEn bit in C0CTLR register
Sleep bit in C1CTLR register
PortEn bit in C1CTLR register
Figure 10.15 CAN0/1 Wake-up Interrupt Block Diagram
Rev.2.00
Nov 28, 2005
REJ09B0124-0200
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PU25 bit in PUR2 register
PD10_7 bit in PD10 register
PD10_7 bit in PD10 register
PD10_6 bit in
PD10 register
PD10_5 bit in
PD10 register
PD10_4 bit in
PD10 register
CRX0
CRX1
page 98 of 378
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KUPIC register
Interrupt control circuit
C01WKIC register
Interrupt control
circuit
10. Interrupt
______
Key input interrupt
request
CAN0/1 wake-up
interrupt request
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