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Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6NK, M16C/6NM)
Table 1.2 Performance Outline of M16C/6N Group (128-pin Version: M16C/6NM)
Item
CPU
Number of Basic Instructions 91 instructions
Minimum Instruction
Execution Time
Operation Mode
Address Space
Memory Capacity
Peripheral
Port
Function
Multifunction Timer
Serial Interface
A/D Converter
D/A Converter
DMAC
CRC Calculation Circuit
CAN Module
Watchdog Timer
Interrupt
Clock Generating Circuit
Oscillation Stop Detection
Function
Electrical
Supply Voltage
Characteristics
Power
Consumption
Flash Memory Program/Erase Supply Voltage 3.0 ± 0.3V or 5.0 ± 0.5V
Version
Program and Erase Endurance 100 times
I/O
I/O Withstand Voltage
Characteristics Output Current
Operating Ambient Temperature
Device Configuration
Package
NOTES:
2
1. I
C-bus is a registered trademark of Koninklijke Philips Electronics N.V.
2. IEBus is a registered trademark of NEC Electronics Corporation.
option: All options are on request basis.
Rev.2.00
Nov 28, 2005
REJ09B0124-0200
41.7ns (f(BCLK) = 24MHz,
1/1 prescaler, without software wait) 1/1 prescaler, without software wait)
Single-chip, memory expansion Single-chip mode
and microprocessor modes
1 Mbyte
See Table 1.3 Product List
Input/Output: 113 pins, Input: 1 pin
Timer A: 16 bits ✕ 5 channels
Timer B: 16 bits ✕ 6 channels
Three-phase motor control circuit
3 channels
Clock synchronous, UART, I
4 channels
Clock synchronous
10-bit A/D converter: 1 circuit, 26 channels
8 bits ✕ 2 channels
2 channels
CRC-CCITT
2 channels with 2.0B specification
15 bits ✕ 1 channel (with prescaler)
Internal: 34 sources, External: 12 sources
Software: 4 sources, Priority level: 7 levels
4 circuits
• Main clock oscillation circuit (*)
• Sub clock oscillation circuit (*)
• On-chip oscillator
• PLL frequency synthesizer
(*) Equipped with a built-in feedback resistor
Main clock oscillation stop and re-oscillation detection function
VCC = 3.0 to 5.5V (f(BCLK) = 24MHz, VCC = 4.2 to 5.5V (f(BCLK) = 20MHz,
1/1 prescaler, without software wait) 1/1 prescaler, without software wait)
Mask ROM
21mA (f(BCLK) = 24MHz,
PLL operation, no division)
Flash Memory 23mA (f(BCLK) = 24MHz,
PLL operation, no division)
Mask ROM
3µA (f(BCLK) = 32kHz, Wait mode, Oscillation capacity Low)
Flash Memory 0.8µA (Stop mode, Topr = 25°C)
5.0V
5mA
-40 to 85°C
CMOS high performance silicon gate
128-pin plastic mold LQFP
page 3 of 378
Performance
Normal-ver.
50.0ns (f(BCLK) = 20MHz,
2
C-bus
-
21mA (f(BCLK) = 20MHz,
PLL operation, no division)
5.0 ± 0.5V
T version: -40 to 85°C
V version: -40 to 125°C (option)
1. Overview
T/V-ver.
(1)
(2)
, IEBus
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