Renesas M16C/6NK Hardware Manual page 132

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M16C/6N Group (M16C/6NK, M16C/6NM)
Main clock
f1
PLL clock
On-chip
oscillator clock
f1 or f2 f8 f32 fC32
TB0IN
TB1IN
TB2IN
TB3IN
TB4IN
TB5IN
PCLK0: Bit in PCLKR register
TCK1 to TCK0, TMOD1 to TMOD0: Bits in TBiMR register (i = 0 to 5)
NOTE:
1. Be aware that TB5IN shares the pin with RXD2, SCL2 and TA0IN.
Figure 13.2 Timer B Configuration
Rev.2.00 Nov 28, 2005
REJ09B0124-0200
PCLK0 = 0
f2
1/2
PCLK0 = 1
1/8
1/4
Timer B2 overflow or underflow (to a count source of theTimer A)
TCK1 to TCK0
00
01
10
11
1
Noise
filter 0
TCK1
TCK1 to TCK0
00
01
10
11
1
Noise
filter
0
TCK1
TCK1 to TCK0
00
01
10
11
1
Noise
0
filter
TCK1
TCK1 to TCK0
00
01
10
11
1
Noise
0
filter
TCK1
TCK1 to TCK0
00
01
10
11
1
Noise
0
filter
TCK1
TCK1 to TCK0
00
01
10
11
1
Noise
filter 0
TCK1
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f1 or f2
XCIN
f8
Set the CPSR bit in the
CPSRF register to "1"
f32
(prescaler reset)
TMOD1 to TMOD0
Timer mode
00:
Pulse width / period measuring mode
10:
Timer B0
01: Event counter mode
TMOD1 to TMOD0
Timer mode
00:
Pulse width / period measuring mode
10:
Timer B1
01: Event counter mode
TMOD1 to TMOD0
00: Timer mode
Pulse width / period measuring mode
10:
Timer B2
Event counter mode
01:
TMOD1 to TMOD0
Timer mode
00:
Pulse width / period measuring mode
10:
Timer B3
Event counter mode
01:
TMOD1 to TMOD0
00: Timer mode
10: Pulse width / period measuring mode
Timer B4
Event counter mode
01:
TMOD1 to TMOD0
Timer mode
00:
Pulse width / period measuring mode
10:
Timer B5
Event counter mode
01:
13. Timers
Clock prescaler
1/32
fC32
Reset
Timer B0 interrupt
Timer B1 interrupt
Timer B2 interrupt
Timer B3 interrupt
Timer B4 interrupt
Timer B5 interrupt