Renesas M16C/6NK Hardware Manual page 123

Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6NK, M16C/6NM)
DMA0 Request Cause Select Register
b7 b6 b5 b4 b3 b2
NOTE:
1. The causes of DMA0 requests can be selected by a combination of the DMS bit and the DSEL3 to DSEL0 bits
in the manner described below.
DSEL3 to DSEL0 Bits
0000b
Falling edge of INT0 pin
Software trigger
0001b
Timer A0
0010b
Timer A1
0011b
0100b Timer A2
0101b Timer A3
0110b Timer A4
0111b Timer B0
Timer B1
1000b
1001b
Timer B2
1010b
UART0 transmit
1011b
UART0 receive
1100b UART2 transmit
1101b UART2 receive
1110b A/D conversion
UART1 transmit
1111b
Figure 12.2 DM0SL Register
Rev.2.00 Nov 28, 2005
REJ09B0124-0200
b1 b0
Symbol
DM0SL
Bit Symbol
DSEL0
DSEL1
DMA Request Cause
Select Bit
DSEL2
DSEL3
-
Nothing is assigned. When write, set to "0".
(b5-b4)
When read, their contents are "0".
DMA Request Cause
DMS
Expansion Select Bit
Software DMA
DSR
Request Bit
DMS = 0 (basic cause of request)
page 105 of 378
Address After Reset
03B8h 00h
Bit Name
See NOTE 1
0 : Basic cause of request
1 : Extended cause of request
A DMA request is generated by setting
this bit to "1" when the DMS bit is "0"
(basic cause) and the DSEL3 to DSEL0
bits are "0001b" (software trigger).
The value of this bit when read is "0".
DMS = 1 (extended cause of request)
—
—
—
—
—
—
Two edges of INT0 pin
Timer B3
Timer B4
Timer B5
—
—
—
—
—
—
12. DMAC
Function
RW
RW
RW
RW
RW
-
RW
RW