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M16C/6N Group (M16C/6NK, M16C/6NM)
CANi Configuration Register (i = 0, 1)
b7
b6
b5
b4
b3
NOTE:
1. fCAN serves for the CAN clock. The period is decided by configuration of the CCLKi bit (i = 0 to 2, 4 to 6) in the CCLKR register.
(b15)
b7
b6
b5
b4
b3
Figure 19.10 C0CONR and C1CONR Registers
Rev.2.00
Nov 28, 2005
REJ09B0124-0200
b2
b1
b0
Symbol
C0CONR
C1CONR
Bit Symbol
BRP
SAM
PTS
(b8)
b2
b1
b0
Symbol
C0CONR
C1CONR
Bit Symbol
PBS1
PBS2
SJW
page 232 of 378
Address
After Reset
021Ah
Indeterminate
023Ah
Indeterminate
Bit Name
b3 b2 b1 b0
0 0 0 0 : Divide-by-1 of fCAN
0 0 0 1 : Divide-by-2 of fCAN
Prescaler Division
0 0 1 0 : Divide-by-3 of fCAN
Ratio Select Bits
1 1 1 0 : Divide-by-15 of fCAN
1 1 1 1 : Divide-by-16 of fCAN
Sampling Control
0 : One time sampling
Bit
1 : Three times sampling
b7 b6 b5
0 0 0 : 1Tq
0 0 1 : 2Tq
Propagation Time
0 1 0 : 2Tq
Segment Control
Bits
1 1 0 : 7Tq
1 1 1 : 8Tq
Address
After Reset
021Bh
Indeterminate
023Bh
Indeterminate
Bit Name
b2 b1b0
0 0 0 : Do not set a value
0 0 1 : 2Tq
Phase Buffer
0 1 0 : 3Tq
Segment 1
Control Bits
1 1 0 : 7Tq
1 1 1 : 8Tq
b5 b4 b3
0 0 0 : Do not set a value
0 0 1 : 2Tq
Phase Buffer
0 1 0 : 3Tq
Segment 2
Control Bits
1 1 0 : 7Tq
1 1 1 : 8Tq
b7 b6
Resynchronization
0 0 : 1Tq
0 1 : 2Tq
Jump Width
1 0 : 3Tq
Control Bits
1 1 : 4Tq
19. CAN Module
Function
RW
RW
(1)
RW
RW
Function
RW
RW
RW
RW
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