Renesas M16C/6NK Hardware Manual page 275

Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6NK, M16C/6NM)
Pull-up Control Register 3 (128-pin version)
b7 b6 b5 b4 b3 b2
NOTES:
1. The pin for which this bit is "1" (pulled high) and the direction bit is "0" (input mode) is pulled high.
2. If the PU37 bit is set to "0" (unusable), the P11 to P14 regisrers are set to "00h".
Figure20.10 PUR3 Register
Port Control Register
b7 b6 b5 b4 b3 b2
Figure20.11 PCR Register
Rev.2.00 Nov 28, 2005
REJ09B0124-0200
b1 b0
Symbol
PUR3
Bit Symbol
PU30 P11_0 to P11_3 Pull-Up
PU31 P11_4 to P11_7 Pull-Up
PU32 P12_0 to P12_3 Pull-Up
PU33 P12_4 to P12_7 Pull-Up
PU34 P13_0 to P13_3 Pull-Up
PU35 P13_4 to P13_7 Pull-Up
PU36 P14_0, P14_1 Pull-Up
PU37 P11 to P14 Enabling Bit
b1 b0
Symbol
PCR
Bit Symbol
PCR0 Port P1 Control Bit
Nothing is assigned. When write, set to "0".
-
(b7-b1) When read, their contents are "0".
page 257 of 378
Address
03DFh
Bit Name
Address
03FFh
Bit Name
Operation performed when the P1
register is read
0 : When the port is set for input, the
input levels of P1_0 to P1_7 pins
are read. When set for output, the
port latch is read.
1 : The port latch is read regardless of
whether the port is set for input or
output.
20. Programmable I/O Ports
After Reset
00h
Function
0 : Not pulled high
(1)
1 : Pulled high
(2)
0 : Unusable
1 : Usable
After Reset
00h
Function
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
-