Renesas M16C/6NK Hardware Manual page 273

Under development
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M16C/6N Group (M16C/6NK, M16C/6NM)
Port Pi Register (i = 0 to 7, 9 to 13)
b7 b6 b5 b4
NOTES:
1. Since P7_1 and P9_1 are N channel open-drain ports, the data is high-impedance.
2. During memory expansion and microprocessor modes, the Pi register for the pins functioning as bus control
pins (A0 to A19, D0 to D15, CS0 to CS3, RD, WRL/WR, WRH/BHE, ALE, RDY, HOLD, HLDA and BCLK)
cannot be modified.
* Not available memory expansion and microprocessor modes in T/V-ver..
3. When using the ports P11 to P13, set the PU37 bit in the PUR3 register to "1" (usable).
If this bit is set to "0" (unusable), the P11 to P13 regisrers are set to "00h".
4. The P11 to P13 registers are only in the 128-pin version.
Port P8 Register
b7 b6 b5 b4
Port P14 Control Regisrer (128-pin version)
b7 b6 b5 b4
NOTE:
1. When using the port P14, set the PU37 bit in the PUR3 register to "1" (usable).
Figure20.8 P0 to P13 Registers and PC14 Register
Rev.2.00 Nov 28, 2005
REJ09B0124-0200
Symbol
P0 to P3
b3 b2 b1 b0
P4 to P7
(4)
P9 to P12
(4)
P13
Bit Symbol
Pi_0 Port Pi_0 Bit
Pi_1 Port Pi_1 Bit
Pi_2 Port Pi_2 Bit
Pi_3 Port Pi_3 Bit
Pi_4 Port Pi_4 Bit
Pi_5 Port Pi_5 Bit
Pi_6 Port Pi_6 Bit
Pi_7 Port Pi_7 Bit
b3 b2 b1 b0
Symbol
P8
Bit symbol
P8_0 Port P8 _0 Bit
P8_1 Port P8 _1 Bit
Pi8_2 Port P8 _2 Bit
P8_3 Port P8 _3 Bit
P8_4 Port P8 _4 Bit
P8_5 Port P8 _5 Bit
P8_6 Port P8 _6 Bit
P8_7 Port P8 _7 Bit
b3 b2 b1 b0
Symbol
PC14
Bit Symbol
P140 Port P14_0 Bit
P141 Port P14_1 Bit
- Nothing is assigned. When write, set to "0".
(b3-b2)
When read, their contents are indeterminate.
Port P14_0 Direction
PD140
Bit
Port P14_1 Direction
PD141
Bit
- Nothing is assigned. When write, set to "0".
(b7-b6)
When read, their contents are indeterminate.
page 255 of 378
(1) (2) (3)
Address
03E0h, 03E1h, 03E4h, 03E5h
03E8h, 03E9h, 03ECh, 03EDh
03F1h, 03F4h, 03F5h, 03F8h
03F9h
Bit Name
The pin level on any I/O port which is set
for input mode can be read by reading
the corresponding bit in this register.
The pin level on any I/O port which is
set for output mode can be controlled
by writing to the corresponding bit in
this register.
0 : "L" level
1 : "H" level
Address
03F0h
Bit name
The pin level on any I/O port which is set
for input mode can be read by reading
the corresponding bit in this register.
The pin level on any I/O port which is
set for output mode can be controlled
by writing to the corresponding bit in
this register. (Except for P8_5.)
0 : "L" level
1 : "H" level
(1)
Address
03DEh
Bit Name
The pin level on any I/O port which is set
for input mode can be read by reading the
corresponding bit in this register.
The pin level on any I/O port which isset for
output mode can be controlled by writing to
the corresponding bit in this register.
0 : "L" level
1 : "H" level
0 : Input mode
(Functions as an input port)
1 : Output mode
(Functions as an output port)
20. Programmable I/O Ports
After Reset
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Function RW
RW
RW
RW
RW
RW
RW
RW
RW
After Reset
Indeterminate
Function RW
RW
RW
RW
RW
RW
RO
RW
RW
After Reset
XX00XXXXb
Function
RW
RW
RW
-
RW
RW
-