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M16C/6N Group (M16C/6NK, M16C/6NM)
1.3 Block Diagram
Figure 1.1 shows a block diagram of M16C/6N Group (M16C/6NK, M16C/6NM).
Internal peripheral functions
Timer (16 bits)
Output (timer A): 5
Input (timer B): 6
Three-phase motor
control circuit
Watchdog timer
(15 bits)
DMAC
(2 channels)
D/A converter
(8 bits ✕ 2 channels)
NOTES:
1: ROM size depends on microcomputer type.
2: RAM size depends on microcomputer type.
3: Ports P11 to P14 are only in the 128-pin version.
4: 8 bits ✕ 2 channels in the 100-pin version.
Figure 1.1 Block Diagram
Rev.2.00
Nov 28, 2005
REJ09B0124-0200
8
8
Port P0
Port P1
Port P2
A/D converter
(10 bits ✕ 8 channels
Expandable up to 26 channels)
Clock synchronous serial I/O
(3 channels)
CRC arithmetic circuit (CCITT)
(Polynomial: X
M16C/60 series CPU core
R0H
R0L
R1H
R1L
R2
R3
A0
A1
FB
page 4 of 378
8
8
Port P3
Port P4
System clock generating circuit
XCIN-XCOUT
PLL frequency synthesizer
On-chip oscillator
UART or
Clock synchronous serial I/O
(8 bits ✕ 4 channels)
CAN module
16
12
5
+X
+X
+1)
(2 channels)
SB
USP
ISP
INTB
PC
FLG
Port P14
Port P13
(3)
2
8
8
8
Port P5
Port P6
XIN-XOUT
(4)
Memory
(1)
ROM
(2)
RAM
Multiplier
Port P12
Port P11
(3)
(3)
(3)
8
8
8
1. Overview
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