Renesas M16C/6NK Hardware Manual page 81

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M16C/6N Group (M16C/6NK, M16C/6NM)
PLL Control Register 0
b7 b6 b5 b4 b3 b2
0 0 1
NOTES:
1. Write to this register after setting the PRC0 bit in the PRCR register to "1" (write enable).
2. This bit can only be modified when the PLC07 bit = 0 (PLL turned off). The value once written to this bit
cannot be modified.
3. Before setting this bit to "1", set the CM07 bit in the CM0 register to "0" (main clock), set the CM17 to
CM16 bits in the CM1 register to "00b" (main clock undivided mode), and set the CM06 bit in the CM0
register to "0" (CM16 and CM17 bits enable).
4. Multiply by 6 is available Normal-ver. only.
Figure 8.8 PLC0 Register
Rev.2.00 Nov 28, 2005
REJ09B0124-0200
(1)
b1 b0
Symbol
PLC0
Bit Symbol
PLC00
PLL Multiplying Factor
PLC01
Select Bit
PLC02
- Nothing is assigned. When write, set to "0".
(b3)
When read, its content is indeterminate.
-
Reserved Bit
(b4)
-
Reserved Bit
(b6-b5)
PLC07 Operation Enable Bit
page 63 of 378
Address
001Ch
Bit Name
b2 b1 b0
0 0 0 : Do not set a value
0 0 1 : Multiply by 2
0 1 0 : Multiply by 4
0 1 1 : Multiply by 6
(2)
1 0 0 :
1 0 1 :
1 1 0 :
1 1 1 :
Set to "1"
Set to "0"
0 : PLL Off
(3)
1 : PLL On
8. Clock Generating Circuit
After Reset
0001X010b
Function
RW
RW
(4)
RW
Do not set a value
RW
RW
RW
RW
-