Renesas M16C/6NK Hardware Manual page 190

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M16C/6N Group (M16C/6NK, M16C/6NM)
15.1.2.2 Counter Measure for Communication Error Occurs
If a communication error occurs while transmitting or receiving in UART mode, follow the procedures
below.
• Resetting the UiRB register (i = 0 to 2)
(1) Set the RE bit in the UiC1 register to "0" (reception disabled)
(2) Set the RE bit in the UiC1 register to "1" (reception enabled)
• Resetting the UiTB register (i = 0 to 2)
(1) Set the SMD2 to SMD0 bits in the UiMR register to "000b" (serial interface disabled)
(2) Set the SMD2 to SMD0 bits in the UiMR register to "001b", "101b", "110b"
(3) "1" (transmission enabled) is written to the TE bit in the UiC1 register, regardless of the TE bit
15.1.2.3 LSB First/MSB First Select Function
As shown in Figure 15.19, use the UFORM bit in the UiC0 register to select the transfer format. This
function is valid when transfer data is 8-bit long.
(1) When the UFORM bit in the UiC0 register = 0 (LSB first)
CLKi
TXDi
RXDi
(2) When the UFORM bit = 1 (MSB first)
CLKi
TXDi
RXDi
i = 0 to 2
ST: Start bit
P: Parity bit
SP: Stop bit
NOTE:
1. This applies to the case where the register bits are set as follows:
CKPOL bit in UiC0 register = 0 (transmit data output at the falling edge and the receive
data taken in at the rising edge of the transfer clock)
UiLCH bit in UiC1 register = 0 (no reverse)
STPS bit in UiMR register = 0 (1 stop bit)
PRYE bit in UiMR register = 1 (parity enabled)
Figure 15.19 Transfer Format
Rev.2.00 Nov 28, 2005
REJ09B0124-0200
ST D0 D1 D2
ST
D0 D1 D2
D6 D5
ST D7
D6 D5
ST D7
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D3 D4 D5 D6 D7
D3 D4 D5 D6 D7
D4 D3 D2 D1 D0
D4 D3 D2 D1 D0
15. Serial Interface
P SP
P SP
P SP
P SP