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M16C/6N Group (M16C/6NK, M16C/6NM)
UARTi Special Mode Register 2 (i = 0 to 2)
b7
b6
b5
b4
b3
b2
UARTi Special Mode Register 3 (i = 0 to 2)
b7
b6
b5
b4
b3
b2
NOTES:
1. The DL2 to DL0 bits are used to generate a delay in SDAi output by digital means during I
In other than I
2. The amount of delay varies with the load on SCLi and SDAi pins. Also, when using an external clock,
the amount of delay increases by about 100 ns.
Figure 15.9 U0SMR2 to U2SMR2 Registers and U0SMR3 to U2SMR3 Registers
Rev.2.00
Nov 28, 2005
REJ09B0124-0200
b1
b0
Symbol
U0SMR2 to U2SMR2
Bit
Bit Name
Symbol
IICM2
2
I
C Mode Select Bit 2
Clock-Synchronous
CSC
Bit
SCL Wait Output Bit
SWC
ALS
SDA Output Stop Bit
UARTi Initialization
STAC
Bit
SCL Wait Output
SWC2
Bit 2
SDA Output Disable
SDHI
Bit
-
Nothing is assigned. When write, set to "0".
(b7)
When read, its content is indeterminate.
b1
b0
Symbol
U0SMR3 to U2SMR3
Bit
Bit Name
Symbol
Nothing is assigned When write, set to "0".
-
(b0)
When read, its content is indeterminate.
Clock Phase Set Bit
CKPH
Nothing is assigned. When write, set to "0".
-
When read, its content is indeterminate.
(b2)
Clock Output Select
NODC
Bit
Nothing is assigned. When write, set to "0".
-
When read, its content is indeterminate.
(b4)
DL0
SDAi Digital Delay
DL1
Setup Bit
DL2
2
C mode, set these bits to "000b" (no delay).
page 157 of 378
Address
01EEh, 01F2h, 01F6h
See Table 15.12 I
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
0: Transfer clock
1: "L" output
0: Enabled
1: Disabled (high-impedance)
Address
01EDh, 01F1h, 01F5h
0 : Without clock delay
1 : With clock delay
0 : CLKi is CMOS output
1 : CLKi is N channel open-drain output
b7 b6 b5
0 0 0 : Without delay
0 0 1 : 1 to 2 cycle(s) of UiBRG count source
0 1 0 : 2 to 3 cycles of UiBRG count source
0 1 1 : 3 to 4 cycles of UiBRG count source
(1) (2)
1 0 0 : 4 to 5 cycles of UiBRG count source
1 0 1 : 5 to 6 cycles of UiBRG count source
1 1 0 : 6 to 7 cycles of UiBRG count source
1 1 1 : 7 to 8 cycles of UiBRG count source
15. Serial Interface
After Reset
X0000000b
Function
RW
2
RW
C Mode Functions
RW
RW
RW
RW
RW
RW
After Reset
000X0X0Xb
Function
RW
RW
RW
RW
RW
RW
2
C mode.
-
-
-
-
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