Renesas M16C/6NK Hardware Manual page 146

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M16C/6N Group (M16C/6NK, M16C/6NM)
Timer Ai Mode Register (i = 0 to 4)
b7 b6 b5 b4 b3 b2
NOTES:
1.Effective when the TAiTGH and TAiTGL bits in the ONSF or TRGSR register are "00b" (TAiIN pin input).
2.The port direction bit for the TAiIN pin is set to "0" (input mode).
3.Set to "1" (pulse is output), PWM pulse is output.
Figure 13.12 TA0MR to TA4MR Registers in Pulse Width Modulation Mode
Rev.2.00 Nov 28, 2005
REJ09B0124-0200
b1 b0
Symbol
1 1
TA0MR to TA4MR
Bit Symbol
TMOD0
Operation Mode
Select Bit
TMOD1
Pulse Output Function
MR0
Select Bit
External Trigger Select
MR1
(1)
Bit
MR2 Trigger Select Bit
16/8-Bit PWM Mode
MR3
Select Bit
TCK0
Count Source Select Bit
TCK1
page 128 of 378
Address After Reset
0396h to 039Ah 00h
Bit Name
b1 b0
1 1 : PWM mode
0 : Pulse is not output
(TAiOUT pin is a normal port pin)
1 : Pulse is output
(3)
(TAiOUT pin is a pulse output pin)
0 : Falling edge of input signal to TAiIN pin
1 : Rising edge of input signal to TAiIN pin
0 : Write "1" to TAiS bit in the TABSR register
1 : Selected by TAiTGH to TAiTGL bits
0 : Functions as a 16-bit pulse width modulator
1 : Functions as an 8-bit pulse width modulator
b7 b6
0 0 : f1 or f2
0 1 : f8
1 0 : f32
1 1 : fC32
13. Timers
RW
Function
RW
RW
RW
(2)
RW
(2)
RW
RW
RW
RW