Renesas M16C/6NK Hardware Manual page 173

16-bit single-chip microcomputer m16c family / m16c/60 series
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M16C/6N Group (M16C/6NK, M16C/6NM)
UARTj Transmit/Receive Control Register 1 (j = 0, 1)
b7
b6
b5
b4
b3
b2
NOTE:
1. The UjLCH bit is enabled when the SMD2 to SMD0 bits in the UjMR register are set to "001b" (clock
synchronous serial I/O mode), "100b" (UART mode, 7-bit transfer data) or "101b" (UART mode, 8-bit
transfer data).
Set this bit to "0" when the SMD2 to SMD0 bits are set to "010b" (I
transfer data).
UART2 Transmit/Receive Control Register 1
b7
b6
b5
b4
b3
b2
NOTE:
1. The U2LCH bit is enabled when the SMD2 to SMD0 bits in the U2MR register are set to "001b" (clock
synchronous serial I/O mode), "100b" (UART mode, 7-bit transfer data) or "101b" (UART mode, 8-bit
transfer data).
Set this bit to "0" when the SMD2 to SMD0 bits are set to "010b" (I
transfer data) .
Figure 15.7 U0C1, U1C1 Registers and U2C1 Register
Rev.2.00
Nov 28, 2005
REJ09B0124-0200
b1
b0
Symbol
U0C1, U1C1
Bit
Bit Name
Symbol
Transmit Enable Bit
TE
Transmit Buffer
TI
Empty Flag
Receive Enable Bit
RE
Receive Complete
RI
Flag
Nothing is assigned. When write, set to "0".
-
When read, their contents are indeterminate.
(b5-b4)
Data Logic
UjLCH
Select Bit
Error Signal Output
UjERE
Enable Bit
b1
b0
Symbol
U2C1
Bit
Bit Name
Symbol
Transmit Enable Bit
TE
Transmit Buffer
TI
Empty Flag
Receive Enable Bit
RE
Receive Complete
RI
Flag
UART2 Transmit Interrupt
U2IRS
Cause Select Bit
UART2 Continuous
U2RRM
Receive Mode Enable Bit
Data Logic
U2LCH
Select Bit
Error Signal Output
U2ERE
Enable Bit
page 155 of 378
Address
03A5h, 03ADh
0 : Transmission disabled
1 : Transmission enabled
0 : Data present in the UjTB register
1 : No data present in the UjTB register
0 : Reception disabled
1 : Reception enabled
0 : No data present in the UjRB register
1 : Data present in the UjRB register
0 : No reverse
(1)
1 : Reverse
0 : Output disabled
1 : Output enabled
2
C mode) or "110b" (UART mode, 9-bit
Address
01FDh
0 : Transmission disabled
1 : Transmission enabled
0 : Data present in U2TB register
1 : No data present in U2TB register
0 : Reception disabled
1 : Reception enabled
0 : No data present in U2RB register
1 : Data present in U2RB register
0 : Transmit buffer empty (TI bit = 1)
1 : Transmit is completed (TXEPT bit = 1) RW
0 : Continuous receive mode disabled
1 : Continuous receive mode enabled
0 : No reverse
(1)
1 : Reverse
0 : Output disabled
1 : Output enabled
2
C mode) or "110b" (UART mode, 9-bit
15. Serial Interface
After Reset
00XX0010b
Function
RW
RW
RO
RW
RO
RW
RW
After Reset
00000010b
Function
RW
RW
RO
RW
RO
RW
RW
RW
-

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