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M16C/6N Group (M16C/6NK, M16C/6NM)
Table 7.6 Pin Functions for Each Processor Mode
Processor Mode
PM05 to PM04 Bits
Data Bus Width
BYTE Pin
P0_0 to P0_7
P1_0 to P1_7
P2_0
P2_1 to P2_7
P3_0
P3_1 to P3_3
P3_4
PM11 = 0 A12 to A15
to P3_7
PM11 = 1 I/O ports
P4_0
PM06 = 0 A16 to A19
to P4_3
PM06 = 1 I/O ports
P4_4
CS0 = 0
CS0 = 1
P4_5
CS1 = 0
CS1 = 1
P4_6
CS2 = 0
CS2 = 1
P4_7
CS3 = 0
CS3 = 1
P5_0
PM02 = 0
PM02 = 1 -
P5_1
PM02 = 0
PM02 = 1 -
P5_2
P5_3
P5_4
P5_5
P5_6
P5_7
I/O ports: Function as I/O ports or peripheral function I/O pins.
NOTES:
1. For setting the PM01 to PM00 bits to "01b" (memory expansion mode) and the PM05 to PM04 bits to
"11b" (multiplexed bus assigned to the entire CS space), apply "H" to the BYTE pin (external data bus is
an 8-bit width). While the CNVSS pin is held "H" (VCC), do not rewrite the PM05 to PM04 bits to "11b"
after reset. If the PM05 to PM04 bits are set to "11b" during memory expansion mode, P3_1 to P3_7
and P4_0 to P4_3 become I/O ports, in which case the accessible area for each CS is 256 bytes.
2. In separate bus mode, these pins serve as the address bus.
3.
If the data bus is 8-bit width, make sure the PM02 bit is set to "0" (RD, BHE, WR).
4. When accessing the area that uses a multiplexed bus, these pins output an indeterminate value during
a write.
Rev.2.00
Nov 28, 2005
REJ09B0124-0200
Memory Expansion Mode or Microprocessor Mode
00b (separate bus)
8 bits
16 bits
"H"
"L"
D0 to D7
I/O ports
D8 to D15
A0
A1 to A7
A8
A9 to A11
I/O ports
_______
CS0
I/O ports
_______
CS1
I/O ports
_______
CS2
I/O ports
_______
CS3
_______
WR
________
(3)
WRL
________
BHE
_________
(3)
WRH
_____
RD
BCLK
__________
HLDA
__________
HOLD
ALE
________
RDY
page 51 of 378
_______
01b (CS2 is for multiplexed bus and
others are for separate bus)
_______
10b (CS1 is for multiplexed bus and
others are for separate bus)
8 bits
"H"
(4)
D0 to D7
I/O ports
D8 to D15
(2)
A0/D0
A0
A1 to A7
A1 to A7
(2)
/D1 to D7
/D0 to D6
A8/D7
________
(3)
-
WRL
_________
(3)
-
WRH
_____
_____
Memory Expansion Mode
11b
(multiplexed bus for
the entire space)
16 bits
8 bits
"L"
"H"
I/O ports
(4)
I/O ports
A0/D0
A1 to A7/D1 to D7
(2)
(2)
A8
I/O ports
I/O ports
I/O ports
(3)
-
(3)
-
_____
________ ______
7. Bus
(1)
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