Renesas M16C/6NK Hardware Manual page 160

Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6NK, M16C/6NM)
Three-Phase Output Buffer Register i (i = 0, 1)
b7 b6 b5 b4 b3 b2
0 0
NOTE:
1. Values of the IDB0 and IDB1 registers are transferred to the three-phase output shift register by a transfer
trigger.
After the transfer trigger occurs, the values written in the IDB0 register determine each phase output
signal first. Then the value written in the IDB1 register on the falling edge of timers A1, A2 and A4 one-shot
pulse determines each phase output signal.
Dead Time Timer
b7
NOTES:
1. Use the MOV instruction to set the DTT register.
2. The DTT register is enabled when the INV15 bit in the INVC1 register is set to "0" (dead time enabled).
No dead time can be set when the INV15 bit is set to "1" (dead time disabled). The INV06 bit in the INVC0
register determines start trigger of the DTT register.
Figure 14.4 IDB0 and IDB1 Registers and DTT Register
Rev.2.00 Nov 28, 2005
REJ09B0124-0200
b1 b0
Symbol
IDB0, IDB1
Bit
Symbol
DUi U-Phase Output Buffer i
DUBi
U-Phase Output Buffer i
DVi V-Phase Output Buffer i
DVBi V-Phase Output Buffer i
DWi W-Phase Output Buffer i
DWBi
W-Phase Output Buffer i
-
Reserved Bit
(b7-b6)
(1) (2)
b0
Symbol
DTT
If setting value is n , the timer stops when counting
n times a count source selected by the INV12 bit
in the INVC1 register after start trigger occurs.
Positive or negative phase, which changes from
inactive level to active level, shifts when the dead
time timer stops.
page 142 of 378
14. Three-Phase Motor Control Timer Function
(1)
Address
01CAh, 01CBh
Bit Name
Write output level
0: Active level
1: Inactive level
When read, the value of the three-
phase shift register is read.
Set to "0"
Address
01CCh
Function
After Reset
00h
Function RW
RW
RW
RW
RW
RW
RW
RO
After Reset
Indeterminate
Setting Range
RW
1 to 255 WO