Figure 6-8 Single Stm, Followed By Sequential Instruction Fetch; Ldm Followed By Instruction Fetch - ARM ARM966E-S Technical Reference Manual

CLK
HTRANS
HADDR
HWRITE
HWDATA
HRDATA
HREADY
ARM DDI 0186A
NONSEQ
DA-1

Figure 6-8 Single STM, followed by sequential instruction fetch

Note
The single IDLE cycle that normally occurs at the end of an
NONSEQ cycle for the instruction fetch.

LDM followed by instruction fetch

Figure 6-9 on page 6-14 shows an example of a
immediately followed by an instruction fetch. A single IDLE cycle is inserted after the
final sequential data access, and instruction fetch begins with a NONSEQ/IDLE
sequence.
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SEQ SEQ NONSEQ
DA-2 DA-3
DA-2 DA-3
Bus Interface Unit
IDLE NONSEQ
IA-1
DD-3
ID-1
STM is filled by the
LDM transferring three words,
IDLE
IA-2
ID-2
6-13