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ARM DDI 0186A
Name
Direction
HBUSREQ
Output
Bus request
HLOCK
Output
Request locked
transfers
HGRANT
Input
Bus grant
Copyright © 2000 ARM Limited. All rights reserved.
Table A-2 AHB signals (continued)
Description
Indicates that the ARM966E-S requires the bus.
When HIGH, indicates that the ARM966E-S requires
locked access to the bus and no other master is
granted until this signal has gone LOW. Asserted by
the ARM966E-S when executing SWP instructions
to AHB address space.
Indicates that the ARM966E-S is currently the
highest priority master. Ownership of the address and
control signals changes at the end of a transfer when
HREADY is HIGH, so the ARM966E-S gets access
to the bus when both HREADY and HGRANT are
HIGH.
Signal Descriptions
A-5
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