ARM ARM966E-S Technical Reference Manual page 186

Table of Contents

Advertisement

SRAM Stall Cycles
C-10
CLK
DnMREQ
InMREQ
DnRW
DA[31:1]
IA[31:1]
I-SRAM Addr
RDATA[31:0]
INSTR[31:0]
SYSCLKEN
Figure C-9 I-SRAM write followed by instruction fetch, data read
Copyright © 2000 ARM Limited. All rights reserved.
I-SRAM
data read
inst. fetch
stall
cycle
Addr A (read)
Addr B (I fetch)
Addr A
Addr B
Read data (A)
I-SRAM
Read Instr (B)
ARM DDI 0186A

Advertisement

Table of Contents
loading

Table of Contents